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Low latency is a topic within capital markets, where the proliferation of algorithmic trading requires firms to react to market events faster than the competition to increase profitability of trades. For example, when executing arbitrage strategies the opportunity to "arb" the market may only present itself for a few milliseconds before parity is achieved.
To demonstrate the value that clients put on latency, a large global investment bank has stated that every millisecond lost results in $100m per annum in lost opportunity.

Traditional models of concurrent programming have been around for some time. They work well and have matured quite a bit over the last couple of years. However, every once in a while there is low latency and high throughput requirements that can't be met by traditional models of concurrency and application design. How about handling 400-500 million operations/second per core of a system.

When designing such systems one has to throw away the traditional models of application design and thing different. Our training and consulting will tell you some of the approaches that can make this possible. This approach is hardware friendly and a re-look at data from a hardware perspective. It requires logical understanding of how modern hardware works.
It also requires the knowledge of tools that can help track down a particular stall and possibly the reason behind it. This may provide pointers for a redesign if required. In the balance then, these trainings are about an architecture which is Hardware friendly. It is also about very specialized data structures that fully exploits the underlying architecture of the processor, cache and memory.

Our Expertise

  • Off-Heap memory layout
  • CPU Architecture and impact on software design
  • Memory Architecture and impact on software design
  • Disc and File System Architecture and impact on software design
  • Network Architecture and impact on software design
  • Libraries
  • OpenHFT
  • Disruptor
  • Highly-Scalable-Library

  • Get expert consulting on how ultra low latency designs and architectures are done.
    Understand the code changes to "Align" software with hardware.